Polycrystalline thin film transistors have the potential for extensive applications in large area electronic devices such as flat panel displays and image sensors. Recently, studies of polysilicon thin film transistors have concentrated on methods for reducing their fabrication cost, either by reducing the transistors' processing time or by lowering the processing temperatures. The latter effect is important since it can allow the usage of less expensive substrates for the transistor arrays, e.g., glass, plastic, etc.. For instance, Czubatyj et al. in "Low-Temperature Polycrystalline TFT on 7059 Glass", IEEE Electron Device Letters, Vol. 10, pages 349-351, 1989, demonstrated that polysilicon thin film transistors could be fabricated on 7059 glass substrates using relatively low temperature furnace annealing for crystallization. However, their crystallization process took longer than 75 hours and was therefore not practically applicable.
The inventors hereof in "Low Thermal Budget Poly-Silicon Thin Film Transistors on Glass", Japanese Journal of Applied Physics, Vol. 30, pages L269-L271, 1991 demonstrated that thin film transistors could be fabricated on polysilicon films. Those films were obtained by a rapid thermal annealing of the films for five minutes at 700.degree. C. on 7059 glass substrates.
In U.S. Pat. No. 5,147,826 to Liu et al., the inventors hereof teach that the prior art thermal anneal procedure at 700.degree. C. (for converting amorphous silicon to polycrystalline silicon) can be reduced to a range of from 550.degree. C. to 650.degree. C. This improvement was accomplished by depositing a very thin discontinuous film of a nucleating site forming material over an already deposited layer of amorphous silicon. The two contiguous films were then rapidly thermally annealed, with the nucleating site forming material enabling the crystallization of the underlying amorphous silicon at temperatures lower than had theretofore been reported.
Liu et al. also reported in the '826 patent that the amorphous silicon could be selectively crystallized by depositing the nucleating site performing material in a pattern thereon and subsequently subjecting the patternized surface to an anneal procedure. Because the nucleating site forming material was a metal, the treated surface of the subsequently crystallized silicon was not optimal for structures (having this surface as a boundary for an active region). As a result, additional processing steps were required to allow untreated surfaces to become boundaries for devices to be grown.
Accordingly, it is an object of this invention to provide an improved method for enabling selective crystallization of an amorphous silicon film.
It is another object of this invention to provide a method for crystallizing amorphous silicon films which enables usage of the crystallized film for device application without requiring access to a hidden surface thereof.
It is yet another object of this invention to provide an improved method for selective crystallization of amorphous silicon films which employs an inexpensive substrate as a support therefor.